This invention relates to phase detectors that are used in synchronizing systems, and in particular, to phase detectors that may obtain greater than 360.degree. in phase error.
Some phase lock loops that utilize phase detectors have large phase excursions at the phase detector input causing a large output frequency change from the phase lock loop. These excursions may greatly exceed the usual 2.pi. or 4.pi. radian phase range of digital phase detectors, such as that disclosed in U.S. Pat. No. 3,989,931 or U.S. Pat. No. 3,431,509. When the phase limit is reached in the prior art detectors, the phase lock loop goes out of lock and considerable time is lost until the reestablishment of phase lock is achieved. Phase detectors with much larger phase range have been tried, but were unacceptable because of disturbances during coincidences or crossover of the two pulses that were used as reference pulses. In the case where ring counters are used, a modulation at a subharmonic of the reference frequency that is used to control the phase lock loop is generated.